1. Field of the Invention
The present invention is generally directed to bias generator circuits.
2. Background Art
A bias generator is an essential building block for many analog circuits. For example, a bias generator may be used in a phase lock loop (PLL) to provide a bias current to analog sub-circuits included in the PLL, such as a charge-pump and a current controlled oscillator (ICO). A conventional complementary metal-oxide semiconductor (CMOS) bias generator provides a temperature dependent output current. Such an output current has a positive temperature coefficient, in which case the output current increases with increased operating temperature. In particular, for PLL circuits implemented in deep sub-micron 0.13 microns, 0.11 microns, 90 nanometers and 80 nanometers CMOS technologies, the output current may vary by as much as 50% over operating temperatures ranging from −10 degree C. to 125 degree C.
Large changes in the output current of a bias generator can have deleterious effects on circuit functionality. For example, variation in bias current causes the characteristics of the charge-pump to change. Variation in bias current also causes the oscillation frequency of the ICO to vary from its design target, thereby affecting the ICO gain and ICO range. As a consequence, PLL stability and jitter performance are affected. Thus, temperature dependent bias generators are problematic.
One possible solution for reducing the temperature dependences of a PLL is to use a bias generator that provides a temperature invariant bias voltage, rather than a temperature invariant bias current. The bias voltage can be converted to a bias current and then the bias current can be provided to the analog sub-circuits of the PLL, such as the ICO.
However, converting a temperature invariant bias voltage to a bias current requires additional circuitry, such as a voltage-to-current (V-to-I) converter. Such V-to-I converters often introduce some degree of temperature dependencies at the output due to the temperature dependency of the additional circuit components. To overcome this problem, off-chip components are sometimes used for very accurate V-to-I conversion. The off-chip components take up board space and increase cost, and are therefore undesirable in terms of integrated PLL designs.
Given the foregoing, what is needed is a zero temperature coefficient current bias generator, and applications thereof. Such a bias generator is desirably implemented in CMOS technology to reduce power consumption.
The features and advantages of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.